Nanoelectronics High-throughput, wafer-scale testing of MEMS materials and devices


The main advantage of wafer-scale characterization of CMOS circuits is that a high level of automation can be achieved. This facilitates systematic and cost-effective testing, renders experiments less dependent on human factors, and enables the fast acquisition and accumulation of large and reliable data sets. Numerous well-established optical and electrical wafer-level techniques are used in IC production. In contrast, few wafer-level testing techniques are available in the industry related to microelectromechanical systems.

Methods used to characterize MEMS materials and devices include the wafer curvature, beam buckling analysis, the bulge test, the microtensile technique, nanoindentation, resonance frequency and pull-in voltage measurements. These techniques (and their variations) are being extended by INL to high-throughput, automated tests realized at the 8-inch-diameter wafer-scale with device densities approaching those of IC industry standards.

An advanced MEMS testing service center is being created for supporting both in-house device development as well as external customers. Its focus will be not only on device analysis but also on micromechanical materials characterization, since device functionality and reliability strongly depend on mechanical parameters.