The ability to integrate the Spintronic devices in standard CMOS wafers is a fundamental step for large-scale production, dissemination and commercialization of the research produced at INL. Furthermore, Spintronics and CMOS technology can be integrated to create hybrid devices with functionalities which are not available in any of the two individual technologies.
A first test of this integration was made with a relative high density matrix of magnetic sensors used to sense the magnetic fields. An array of 256×256 devices, which is equal to 65536 MTJs (micro-sized sensors), on a CMOS chip of 4×6 mm2 was successfully integrated. The CMOS design allowed addressing each individual element, sweeping the full matrix to form a magnetic field image and showed a very high success rate of the integration (>90%). The topology of such matrix is very similar to the topology used in non-volatile memory applications (MRAM), but rather than using bi-stable elements, this matrix used magnetic sensors with an analog output.